october 2005 p2040a rev 1.2 notice: the information in this document is subject to change without notice. alliance semiconductor 2575 augustine drive ? santa clara, ca ? tel: 408.855.4900 ? fax: 408.855.4999 ? www.alsc.com lcd panel emi reduction ic features ? fcc approved method of emi attenuation. ? provides up to 20db of emi suppression. ? generates a low emi spread spectrum clock of the input frequency. ? input frequency range: 30mhz to 100mhz. ? optimized for vga, svga, and higher resolution xga lcd panels. ? internal loop filter minimizes external components and board space. ? six selectable high spread ranges up to 2%. ? two selectable modulation rates. ? sson# control pin for spread spectrum enable and disable options. ? low cycle-to-cycle jitter. ? wide operating range. ? low power cmos design. ? supports most mobile graphic accelerator specifications. ? products available for automotive temperature range. (refer spread spectrum range selection tables) ? available in 8-pin soic and tssop packages. product description the p2040a is a versatile spread spectrum frequency modulator designed specifically for digital flat panel applications. the p2040a reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream clock and data dependent signals. the p2040a allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass emi regulations. the p2040a uses the most efficient and optimized modulation profile approved by the fcc and is implemented in a proprietary all digital method. the p2040a modulates the output of a single pll in order to ?spread? the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. this results in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most frequency generators. lowering emi by increasing a signal?s bandwidth is called ?spread spectrum clock generation?. applications the p2040a is targeted towards digital flat panel applications for notebook pcs, palm-size pcs, office automation equipments and lcd monitors. block diagram vdd clkin modout vss frequency divider feedback divider modulation phase detector loop filter vco output divider pll sson# sr0 sr1 mra
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 2 of 9 notice: the information in this document is subject to change without notice. mra sson# modout 1 2 3 4 5 6 7 8 p2040a clkin sr1 vss sr0 vdd pin configuration pin description pin# pin name type description 1 clkin i external reference frequency input. con nect to externally generated reference signal. 2 mra i digital logic input used to select modulati on rate. this pin has an internal pull-up resistor. 3 sr1 i digital logic input used to select spreading range. this pin has an internal pull-up resistor. 4 vss p ground to entire chip. connect to system ground. 5 sson# i digital logic input used to enable spread spec trum function (active low). spread spectrum function enabled when low, disabled when high. this pin has an internal pull-low resistor. 6 modout o spread spectrum clock output. 7 sr0 i digital logic input used to select spreading range. this pin has an internal pull-up resistor. 8 vdd p power supply for the entire chip (3.3v) modulation selection (commercial) mra sr1 sr0 spreading range modulation rate (khz) 0 0 0 1.125 (fin /40) * 34.72khz 0 0 1 1.75 (fin /40) * 34.72khz 0 1 0 0.75 (fin /40) * 34.72khz 0 1 1 1.25 (fin /40) * 34.72khz 1 0 0 1.25 (fin /40) * 20.83khz 1 0 1 2.00 (fin /40) * 20.83khz 1 1 0 reserved reserved 1 1 1 reserved reserved
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 3 of 9 notice: the information in this document is subject to change without notice. spread range selection at 50mhz (automotive) mra sr1 sr0 spreading range modulation rate 0 0 0 1.25 (f in /40) * 34.72khz 0 0 1 2.00 (f in /40) * 34.72khz 0 1 0 1.00 (f in /40) * 34.72khz 0 1 1 1.50 (f in /40) * 34.72khz 1 0 0 1.25 (f in /40) * 20.83khz 1 0 1 2.00 (f in /40) * 20.83khz 1 1 0 1.25 (f in /40) * 20.83khz 1 1 1 2.00 (f in /40) * 20.83khz spread range selection at 70mhz (automotive) mra sr1 sr0 spreading range modulation rate 0 0 0 1.00 (f in /40) * 34.72khz 0 0 1 1.50 (f in /40) * 34.72khz 0 1 0 0.70 (f in /40) * 34.72khz 0 1 1 1.00 (f in /40) * 34.72khz 1 0 0 1.15 (f in /40) * 20.83khz 1 0 1 2.00 (f in /40) * 20.83khz 1 1 0 1.15 (f in /40) * 20.83khz 1 1 1 1.75 (f in /40) * 20.83khz
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 4 of 9 notice: the information in this document is subject to change without notice. spread spectrum selection the modulation selection table defines the possible spread spectrum options. the optimal setting should minimize system emi to the fullest without affecting system performance. the spreading is described as a perce ntage deviation of the center frequency. (note: the center frequency is the frequency of the external reference input on clkin, pin1). for example, p2040a is designed for high-resolution, flat pane l applications and is able to s upport an xga (1024 x 768) flat panel operating at 65mhz (f in ) clock speed. a spreading se lection of mra=0, sr1=1 and sr0=0 provides a percentage deviation of 0.75% from f in . this results in the frequency on modout being swept from 64.51mhz to 65.49mhz at a modulation rate of 56.24khz. refer modulation selection table . the example in the following illustration is a common emi reduction method for a notebook lcd panel and has already be en implemented by most of the leading oem and mobile graphic accelerator manufacturers. application schematic for mobile lcd graphics controllers modulated 65mhz signal with 0.75 deviation and modulation rate of 56.24khz. this signal is connected back to the spread spectrum input pin (ssin) of the graphics accelerator. 1 2 3 4 clkin mra sr1 vss sr0 5 6 7 8 sson# modout vdd 65mhz from graphics accelerator +3.3v 0.1f p2040a digital control for the ss enable or disable
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 5 of 9 notice: the information in this document is subject to change without notice. absolute maximum ratings symbol parameter rating unit vdd, v in voltage on any pin with respect to ground -0.5 to +7.0 v t stg storage temperature -65 to +125 c t c operating temperature-commercial 0 to 70 c t a operating temperature ? automotive -40 to +125 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22- a114-b) 2 kv note: these are stress ratings only and are no t implied for functional use. exposure to absolute maximum ratings for prolonge d periods of time may affect device reliability . dc electrical characteristics (test condition: all parameters are measured at ro om temperature (+25c) unless otherwise stated) symbol parameter min typ max unit v il input low voltage vss - 0.3 - 0.8 v v ih input high voltage 2.0 - vdd + 0.3 v i il input low current (pull-up resistor on inputs sr0, sr1 and mra) -35 - - a i ih input high current (pull-down resistor on input sson#) - - 35 a v ol output low voltage (vdd = 3.3v, i ol = 20ma) - - 0.4 v v oh output high voltage (vdd = 3.3v, i oh = 20ma) 2.5 - - v i dd static supply current standby mode - 0.6 - ma i cc dynamic supply current (3.3v and 10pf loading) 7 10 13 ma vdd operating volt age 2.7 3.3 3.7 v t on power-up time (first locked cycle after power up) - 0.18 - ms z out clock output impedance - 50 - ? ac electrical characteristics symbol parameter min typ max unit f in input frequency 30 - 100 mhz f out output frequency 30 - 100 mhz t lh * output rise time (measured at 0.8v to 2.0v) 0.7 0.9 1.1 ns t hl * output fall time (measured at 2.0v to 0.8v) 0.6 0.8 1.0 ns t jc jitter (cycle to cycle) - - 360 ps t d output duty cycle 45 50 55 % *t lh and t hl are measured into a capacitive load of 15pf
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 6 of 9 notice: the information in this document is subject to change without notice. package information 8-lead (150-mil) soic package d e h d a1 a2 a l c b e dimensions inches millimeters symbol min max min max a1 0.004 0.010 0.10 0.25 a 0.053 0.069 1.35 1.75 a2 0.049 0.059 1.25 1.50 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.18 0.25 d 0.193 bsc 4.90 bsc e 0.154 bsc 3.91 bsc e 0.050 bsc 1.27 bsc h 0.236 bsc 6.00 bsc l 0.016 0.050 0.41 1.27 0 8 0 8
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 7 of 9 notice: the information in this document is subject to change without notice. e h a a1 a2 d b c l e 8-lead thin shrunk small outline package (4.40-mm body) dimensions inches millimeters symbol min max min max a 0.043 1.10 a1 0.002 0.006 0.05 0.15 a2 0.033 0.037 0.85 0.95 b 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 d 0.114 0.122 2.90 3.10 e 0.169 0.177 4.30 4.50 e 0.026 bsc 0.65 bsc h 0.252 bsc 6.40 bsc l 0.020 0.028 0.50 0.70 0 8 0 8
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 8 of 9 notice: the information in this document is subject to change without notice. ordering information part number marking package type temperature p2040a -08-st p2040a 8-pin soic,tube commercial p2040a -08-sr p2040a 8-pin soic, tape and reel commercial p2040af-08-st p2040af 8-pin soic, tube, pb free commercial p2040af-08-sr p2040af 8-pin soic, tape and reel, pb free commercial p2040ag-08-st p2040ag 8-pin soic, tube, green commercial p2040ag-08-sr p2040ag 8-pin soic, tape and reel, green commercial i2040a-08-st i2040a 8-pin soic, tube industrial i2040a-08-sr i2040a 8-pin soic, tape and reel industrial i2040af-08-st i2040af 8-pin soic, tube, pb free industrial i2040af-08-sr i2040af 8-pin soic, tape and reel, pb free industrial i2040ag-08-st i2040ag 8-pin soic, tube, green industrial i2040ag-08-sr i2040ag 8-pin soic, tape and reel, green industrial p2040a-08-tt p2040a 8-pin tssop, tube commercial p2040a-08-tr p2040a 8-pin tssop, tape and reel commercial p2040af-08-tt p2040af 8-pin tssop, tube, pb free commercial p2040af-08-tr p2040af 8-pin tssop, tape and reel, pb free commercial p2040ag-08-tt p2040ag 8-pin tssop, tube, green commercial p2040ag-08-tr p2040ag 8-pin tssop, tape and reel, green commercial i2040a-08-tt i2040a 8-pin tssop, tube industrial i2040a-08-tr i2040a 8-pin tssop, tape and reel industrial i2040af-08-tt i2040af 8-pin tsso p, tube, pb free industrial i2040af-08-tr i2040af 8-pin tssop, tape and reel, pb free industrial i2040ag-08-tt i2040ag 8-pin t ssop, tube, green industrial i2040ag-08-tr i2040ag 8-pin tssop, tape and reel, green industrial device ordering information p2040a f-08xx licensed under u.s patent nos 5,488,627 and 5,631,921 sr - soic, t/r tt ? tssop, tube tr - tssop, t/r st ? soic, tube devi c e n u mbe r flow: p = commercial temperature range (0c to 70c) i = industrial temperature range (-40c to 85c) pin cou n t d e vi at i o n (%) a n d sp r ead opt i o n i de n t ifi er f = lead free and and rohs compliant part g = green
october 2005 p2040a rev 1.2 lcd panel emi reduction ic 9 of 9 notice: the information in this document is subject to change without notice. ? copyright 2003 alliance semiconductor corporation. all right s reserved. our three-point logo, our name and intelliwatt are trademarks or registered trademarks of alli ance. all other brand and product names ma y be the trademarks of their respective companies. alliance reserves the right to make changes to this document and its products at an y time without notice. alliance assumes no responsibility for any errors that may appear in this document. the data containe d herein represents alliance's best data and/or estimates at the time of issuance. alliance re serves the right to change or correct this data at any time, without notice. if the product described herein is under developm ent, significant changes to thes e specifications are possible. the information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provid e, any guarantee or warrantee to any user or customer. alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any expres s or implied warranties related to the sale and/or use of alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellec tual property rights, except as express agreed to in allian ce's terms and conditions of sale (which are available from a lliance). all sales of alliance products are made exclusively according to alliance's terms and conditions of sale. the purchase of products from alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of alliance or third parties. alliance does not authorize its products for use as cr itical components in life-suppor ting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the incl usion of alliance products in su ch life-supporting systems implies that the manufacturer assumes all risk of such us e and agrees to indemnify alliance against all claims arising from such use. alliance semiconductor corporation 2575 augustine drive, santa clara, ca 95054 tel# 408-855-4900 fax: 408-855-4999 www.alsc.com copyright ? alliance semiconductor all rights reserved preliminary information part number: p2040a document version: v1.2 note: this product utilizes us patent # 6,646,463 impedance emulator patent issued to alliance semiconductor, dated 11-11-2003
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